Course Description
Introduction to digital logic design. Boolean algebra, switching functions, Karnaugh maps, modular combinational circuit design, latches, flip-flops, finite state machines, synchronous sequential circuit design, datapaths, memory technologies, caches, and memory hierarchies. Use of several CAD tools for simulation, logic minimization, synthesis, state assignment, and technology mapping.
Summer I 10W 2025
Instructors
Meeting Patterns
Classes Start:
May 14, 2025
Classes End:
July 25, 2025
Location:
02015 Engineering Building I
Class Days:
M T W H
Class Start Time:
9:50am
Class End Time:
11:20am
Class Type:
Lecture
Credits:
3.00
Restrictions:
Prerequisite: C- or better in ECE 109 Requisite: EE or CPE Majors Only
