Course Description
Architecture of microprocessors. Measuring performance. Instruction-set architectures. Memory hierarchies, including caches, prefetching, program transformations for optimizing caches, and virtual memory. Processor architecture, including pipelining, hazards, branch prediction, static and dynamic scheduling, instruction-level parallelism, superscalar, and VLIW. Major projects.
DE Fee
Engineering Online GRAD
DE Program
MS E
Spring 2025
Meeting Patterns
Class Type:
Lecture
Credits:
3.00
Restrictions:
Enrollment for this course is through the Engineering Online Registration System. Go to http://go.ncsu.edu/eol_registration