Course Description
Introduction to digital logic design. Boolean algebra, switching functions, Karnaugh maps, modular combinational circuit design, latches, flip-flops, finite state machines, synchronous sequential circuit design, datapaths, memory technologies, caches, and memory hierarchies. Use of several CAD tools for simulation, logic minimization, synthesis, state assignment, and technology mapping.
Spring 2025
Instructors
Meeting Patterns
Classes Start:
January 6, 2025
Classes End:
April 22, 2025
Location:
02124 Engineering Building 3
Class Days:
T H
Class Start Time:
11:45am
Class End Time:
1:00pm
Class Type:
Lecture
Credits:
3.00
Restrictions:
Prerequisite: C- or better in ECE 109 Requisite: EE or CPE Majors Only
